Advanced Electrical Systems
Institute for Energy and Environment
Department of Electronic & Electrical Engineering
University of Strathclyde
Glasgow, UK
email: steven.m.blair@strath.ac.uk
office: +44 (0)141 548 4839
lab: +44 (0)141 548 5865
This program uses the open source rapid61850 project to listen to Sampled Value streams in real-time.
Sampled Value data are analysed using code by Andrew Roscoe, as summarised in this paper. This provides detailed information about the voltage and current fundamental magnitude and phase, harmonics, power flow, etc. Frequency analysis is done using the resampled DFT method described in this paper, which is computationally efficient and offers low spectral leakage. The voltage and current information is visualised using a Qt-based GUI. The program is designed to be easy to use, lightweight, open source, and cross-platform.
Code coming soon!
The goal of this software is to automatically generate C/C++ code which reads and writes GOOSE and Sampled Value packets. Any valid IEC 61850 Substation Configuration Description (SCD) file, describing GOOSE and/or SV communications, can be used as the input. The output code is lightweight and platform-independent, so it can run on a variety of devices, including low-cost microcontrollers and the Raspberry Pi. It's useful for rapid-prototyping new power system protection, control, and automation systems that require communications.
The generated C code can be used as part of a C/C++ application, or can be compiled as a library for use within a Python or Java program.
The code is available at GitHub. The mbed microcontroller example code for IEC 61850-9-2LE Sampled Values is available here. You can also read the journal paper, the conference paper, look at the presentation slides, or email me for more information.
This page has an interactive visualisation of the steady-state current and power flow between two voltage terminals (with arbitrary magnitude and phase), connected by a series impedance.
It works best with Chrome. The source code is here.
This page has an interactive visualisation of symmetrical/sequence components, using processing.js. It works with Chrome and Firefox. The source code is here.
The dqo/Park transform visualisation (below) also offers a different way for visualising symmetrical components.
This tool plots the dq0 (Park) transform for a specified input waveform. The three-phase input can be specified in terms of positive, negative, and zero sequence magnitudes and phases. It's also possible to add a harmonic of specified number, sequence, magnitude, and phase.
There are three variants of the dq0/Park transform: MATLAB SimPowerSystems version, the "classic" version, and Wikipedia's version.
This uses processing.js, and requires an HTML5 browser, and does not work in Internet Explorer. The source code is here.
I have implemented the SFCL model described in 1 and 2. There is a version of the model for Simulink/SimPowerSystems, and an RSCAD version for an RTDS. Let me know if you have any comments or suggestions.
1 W. Paul, M. Chen, M. Lakner, J. Rhyner, D. Braun, W. Lanz, and M. Kleimaier, "Superconducting fault current limiter: applications, technical and economical benefits, simulations and test results", CIGRE SC 13, Technical Report, 2000.
2 J. Langston, M. Steurer, S. Woodruff, T. Baldwin, and J. Tang, "A generic real-time computer simulation model for superconducting fault current limiters and its application in system protection studies", IEEE Transactions on Applied Superconductivity, vol. 15, no. 2, pp. 2090–2093, 2005.
This tool plots the current-time characteristics of a resistive superconducting fault current limiter (SFCL). Several superconductor properties can be adjusted to see their effect.
It uses processing.js, and requires an HTML5 browser, and does not work in Internet Explorer. The source code is here.
IEEE 738-2006 (IEEE Standard for Calculating the Current-Temperature of Bare Overhead Conductors) includes a QuickBASIC implementation, which is slightly awkward to use. I've implemented the equations for MATLAB in IEEE738TemperatureRise.m, which requires the helper file getI.m.
The source code is on GitHub.
This extension for Google Chrome removes the frame/banner above IEEEXplore PDF files. This makes better use of the vertical screen space.
The source code is on GitHub.
Google Scholar, Strathclyde KnowledgeBase, Strathprints, Research Gate, IET, LinkedIn
An Open Platform for Rapid-Prototyping Protection and Control Schemes with IEC 61850
IEEE Transactions on Power Delivery, vol. 28, no. 2, pp. 1103-1110, April 2013
doi: 10.1109/TPWRD.2012.2231099
Application of Multiple Resistive Superconducting Fault Current Limiters for Fast Fault Detection in Highly-Interconnected Distribution Systems
IEEE Transactions on Power Delivery, vol. 28, no. 2, pp. 1120-1127, April 2013
doi: 10.1109/TPWRD.2012.2228011
Current-Time Characteristics of Resistive Superconducting Fault Current Limiters
IEEE Transactions on Applied Superconductivity, vol. 22, no. 2, April 2012
doi: 10.1109/TASC.2012.2187291
Superconducting Fault Current Limiter Application in a Power-Dense Marine Electrical System
IET Electrical Systems in Transportation, vol. 1, iss. 3, pp. 93-102, September 2011
doi: 10.1049/iet-est.2010.0053
Analysis of Energy Dissipation in Resistive Superconducting Fault Current Limiters for Optimal Power System Performance
IEEE Transactions on Applied Superconductivity, vol. 21, no. 4, pp. 3452-3457, August 2011
doi: 10.1109/TASC.2011.2129518
This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.
Standardization of Power System Protection Settings Using IEC 61850 for Improved Interoperability
IEEE PES General Meeting, Vancouver, Canada, 2013 (to appear).
Demonstration of Adaptive Overcurrent Protection Using IEC 61850 Communications
CIRED, Stockholm, Sweden, 2013 (to appear).
Architecture for Automatically Generating an Efficient IEC 61850-based Communications Platform for Rapid-Prototyping of Protection Schemes
PAC World Conference, Dublin, Ireland, 2011.
Presentation slides
The Use of Real Time Digital Simulation and Hardware in the Loop to De-Risk Novel Control Algorithms
European Conference on Power Electronics and Applications, Birmingham, UK, 2011
The Use of Real Time Digital Simulation and Hardware in the Loop to De-Risk Novel Control Algorithms
IEEE Electric Ship Technologies Symposium, Alexandria, Virginia, USA, 2011, doi: 10.1109/ESTS.2011.5770869
Investigation of Superconducting Fault Current Limiter Application in a Power-Dense Marine Electrical Network
The 5th IET International Conference on Power Electronics, Machines and Drives (PEMD), Brighton, UK, 2010
doi: 10.1049/cp.2010.0024
Implications of Fault Current Limitation for Electrical Distribution Networks
The 10th IET International Conference on Developments in Power System Protection (DPSP), Manchester, UK, 2010
doi: 10.1049/cp.2010.0355, Poster link
Benchmarking and Optimisation of Simulink Code Using Real-Time Workshop and Embedded Coder for Inverter and Microgrid Control Applications
The 44th International Universities' Power Engineering Conference (UPEC), Glasgow, UK, 2009
IEEE Xplore
Operational Control and Protection Implications of Fault Current Limitation in Distribution Networks
The 44th International Universities' Power Engineering Conference (UPEC), Glasgow, UK, 2009
IEEE Xplore
The Analysis and Application of Resistive Superconducting Fault Current Limiters in Present and Future Power Systems
University of Strathclyde, April 2013
Email me for a copy!